sales@ipcb.com
Hybrid ICs are integrated circuits formed by the combination of semiconductor integration technology and thickness (thin). Craft Hybrid ICs are basic circuits that use film-forming methods to create thick or thin-film components on a chip. And combined with discrete semiconductor chips, monolithic integration or small-scale integration on the same substrate, followed by external packaging. It has the characteristics of large, high, and good electrical performance.
With the circuit size is getting smaller and smaller, more and more functions, the operating frequency continues to increase, the circuit board electromagnetic interference phenomenon is becoming more and more prominent, the problem of the electronic board has become the key to the normal operation of the operation of the electronic board. Electromagnetic design has become the key to system design.
1. Electromagnetic Principle
Electromagnetic interference refers to the ability of electronic equipment and power supplies to function properly under a certain level of electromagnetic interference, as well as the ability of equipment and power supplies to limit their own electromagnetic interference and avoid interference with other electronic equipment.
There are three basic conditions for any electromagnetic interference to occur:first, there must be a source of interference, i.e., equipment that generates a harmful electromagnetic field;second, there must be a way to disperse the interference.It is generally recognised that there are two ways of doing this:by means of means and by means of radiation. Therefore, to solve the problem of electromagnetic interference, three factors of electromagnetic interference should be solved one by one: the interference strength of the potential interference factor;blocking the propagation path of the interference; and reducing the sensitivity of the system to dry interference.
The electromagnetic interference in hybrid integrated design includes interference, crosstalk and dry interference. In solving EMI problems,the first step is to determine whether the collection path of the source is latent, radiated or crosstalk. If there is a complete circuit connection between the source of interference and the sensitive equipment,interference will occur at both poles.Radiated interference can occur between wires transmitting high frequency signals.
2. Electromagnetic Design
When determining the electromagnetic emission design, it is first necessary to carry out functional tests and to test the electromagnetic requirements in the circuit of the programme.If the parameters are not satisfied, then modify the parameters to meet the target,such as power and operating frequency, and then protect the design.The second is to do the protection design, including filtering, shielding, grounding and lap design. The third is to do the layout adjustment design, including the overall layout check,component and lead layout check. Circuit electromagnetic foreign design often includes: process selection, layout selection circuit devices and wires.
3.1.Choice of Processes and Articles
Hybrid Integration has several manufacturing processes to choose from,single layer thin film,thin film thick film and fine co-fired thick film.Thin film process can produce high density hybridised thin film materials with small size, high power and high current density. It has the characteristics of low price, stability,reliability and flexibility,and is suitable for high speed and high power circuits. However, it can only be produced in a single layer, and the cost is high. High-thickness films can be produced at a lower cost. Since it is possible to set up the power supply's electromagnetic layer and grounding layer, it is possible to improve the circuit board's electromagnetic interference capability. The distance between the layers is just the distance between the layers.
The single-point co-firing process is more advantageous and is the dominant technology for existing passive integration. The process has excellent transmission characteristics. In addition, it has good thin-film technology characteristics that enable deep and high-performance synthetic circuit combinations.
The active components of hybrid circuits are generally chosen as chips, and if no bare chips are available, the corresponding packaged chips can be used. For the obtained EMC characteristics, surface-mounted chips are used. Chips are selected on the basis of meeting product specifications. When HC can be used, use AC, CMOS40HC. capacitors should have a low trigger in the circuit to avoid excessive signal degradation.
The packaging of the hybrid circuit can be made of deformable metal and cover plate welding, parallel sewing, with good shielding effect.
3.2.Circuit Layout
When planning the layout of a hybrid microcircuit,three main factors must be considered first: the number of inputs/outputs, performance and cost. The power consumption per square inch should not exceed 2W.
In terms of piety, in principle, interrelated components should be damaged, digital circuits, analogue circuits and power circuits should be operated independently, and high-frequency circuits should be separated from equipment. Low-current and high-current circuits,which tend to generate noise, should be kept away from logic circuits. Low-current and high-current circuits that are prone to noise generation should be kept away from the logic circuits. The main sources of interference and light sources,such as circuit circuits and high-frequency circuits, should be placed separately and away from sensitive circuits. Output chips should be placed close to the I/O sockets of the hybrid circuit.
High-frequency vibrations consume small vibration cables and are susceptible to interference from factors such as propagation parameters and mutual electromagnetic interference. They should not be in close proximity to each other, reducing inputs and outputs. Interfaces and low-sodium signal chips. Production.
In a hybrid circuit,the power and ground leads on the substrate are referred to as the power and ground leads on the substrate. It is desirable to evenly distribute the power and ground I/O. The mounting area of the bare chip is connected to the closest substrate plane.
In the hybrid circuit of the composition, specific circuit boards are disposed between the layers of the circuit board, but they generally have the following characteristics:
(1) Power and ground layers are distributed in the surrounding layers.The visible layer can well suppress common mode RF interference and acoustic power diffusion from outside the circuit.
(2) The internal power supply plane and ground antenna can generally be connected to each other as a grounded power supply board,using the interlayer capacitance as the power supply, while the ground shielding plane power current.
(3) Each layer should be prepared with a power supply or ground to create a cancelling effect.
3.3. Layout of the wire
In circuit design, often just to improve or pursue the impact of the equipment on the equipment, the impact of the equipment configuration, and thus a large number of signals radiated into the interference, may cause more space interference problems. Therefore, interference can be well prevented. It is the key to successful design.
3.3.1 Ground Layout
Ground is the basic reference point for circuit operation, and can also be used as a low-impact path for signals. Ground mainly affects the ground of digital circuits. Digital circuits are sensitive to ground noise when outputting low lines. Misoperation causes inhalation and radiated emissions. Therefore, the focus of these interferences is on our understanding of the details of the ground (for digital circuits, pumping ground sensing is important).
The layout of the ground should pay attention to the following solar energy:
(1) According to different power supply voltages, digital and analogue circuits are set up separately.
(2) Common ground is typical.When using the synchronous thick film process, you can set your own ground plane, so that the thick winding range can also reduce the length of the antenna. Wire shielding.
(3) The earth wire should avoid combing.This structure complicates the signal, increases radiation and sensitivity, and chip-to-chip versatility can lead to circuit errors.
(4) For neuro-emergency chips,the time difference that occurs on the ground should be designed as a closed loop to increase the noise tolerance of the circuit.
(5) Circuit boards with analogue and digital functions. Analogue and digital grounds are usually separate and connected only at the power supply.
3.3.2. Power Cord Layout
Generally speaking, in addition to interference caused directly by electromagnetic radiation, electromagnetic interference caused by power cables is also very common. Therefore, the layout of power cables is also very important. Generally, the following rules should be followed:
(1) The power line is basically close to the ground, connected in a wire-wound manner, with small mould radiation and alternating signal lines. Different power line connections are connected to each other.
(2) When using precision technology, analogue and digital power supplies exist separately to avoid mutual interference.
(3) The power plane and ground plane can be used with full dielectrics, speeds and velocities, and should have a tabletop with a low dielectric constant. The power plane should be close to the ground and placed on the ground plane to act on the cosmic clock tubes distributed on the power plane.
(4) The chip should be decoupled between the power input and ground. The decoupling driver introduces a 0.01uF SMD capacitor, which should be mounted close to the chip to create the basic concept of a circuit element for the decoupling SMD capacitor.
(5) When choosing a chip on a chip, choose a chip with a power supply close to ground, which can further decouple the external interface of the coupling capacitor and realise the electromagnetic induction.
3.3.3. Signal Line Layout
When using the single-layer film process, the appropriate method for the outer shell is to lay the ground line first, then feel the key signals, such as high-speed optical fibre signals or sensitive circuits close to the ground, and finally other input signal lines are needed. It is best to arrange the signals according to the direction of signal flow so that the signals appear on the stage.
If EMI is to be minimised, keep the signal lines close to the signal lines with which they are formed to reduce the size of the loop and avoid interference. Low signal paths are close to high density signal paths and unfiltered power lines, and noise sensitive connections are parallel to high current, high speed switching lines. Where possible, make all critical traces strip lines. Incompatible signal lines (analogue, digital and high-speed and low-speed, high-current) and low-current, high-voltage and low-voltage, etc.) should be kept away from each other and not routed in parallel. Short extensions and reductions in length.
The length of an inductive headset with a guide strip is proportional to the logarithm of the length and inversely proportional to the width. Therefore, the tape should be very short and the length of each address or data line of the internal components should remain constant. Low-speed signal inputs as input circuits can be reduced, and high-speed signal inputs are kept as small as possible.
In addition to observing the rules for single-layer performance in a given thick-film process, care should be taken:
Design separate ground planes, signal layer layouts, and ground layers as much as possible. When they cannot be used simultaneously, they must be located on high-frequency or sensitive lines. Distribute signal lines on different layers so that they can be connected to each other. Reduce signal lines and surrounding interference lines between lines on each layer; keep signals on the same layer at a certain level of strength and use corresponding ground loops to isolate and reduce signal lines between lines. High-speed signal lines should be limited to those on the same layer. Too close to the boundary of the substrate, otherwise there will be a characteristic change, easy to increase the sense of boundary, and increase the sense of inspiration.
3.3.4.Circuit Board Layout
160MHz selectivity with 2ns rising edge cyclic signal energy.
The following points should be noted about the layout of the board:
(1) Do not use a daisy-chain structure to transmit the interface signals, but rather a type of structure where all loads are connected directly to the interface driver.
(2) The lead to the crystal input/end should be as short as possible to minimise noise interference and the effect of all outputs on the crystal.
(3) Vibration ground should be connected at the top of a wide, short lead; the nearest digital ground to the crystal should be separate from the crystal and should have fewer vias.