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PCB News - Suggestions for high-frequency circuit layout

PCB News

PCB News - Suggestions for high-frequency circuit layout

Suggestions for high-frequency circuit layout
2019-07-25
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Author:ipcb

Digital components are developing towards high speed, low power consumption, small size, and high anti-interference capabilities. Development has an impact on printed circuit boards. There are some suggestions for high-frequency wiring.


(1) High frequency circuits typically have high integration and high wiring density. Due to wiring being a necessary way to reduce interference, multi-layer boards must be used.

(2) The less circuit bending (high-speed circuit components) between pins, the better. High frequency circuit wiring is best suited, using full straight lines. But you can use 45 polylines or arcs. Following these rules can reduce the external emission of high-frequency signals and their coupling.

(3) The shorter the circuit lines between high-frequency circuit components, the better.

(4) It is best to have less alternation in the circuit of interlayer pins (high-frequency circuit components). Minimizing the alternation between lead layers as much as possible means using as few vias as possible during component deployment. According to measurements, a via can bring about a scattering capacitance of approximately 0.5 pF and reduce damage. The number of through holes can be significantly increased.

(5) High frequency circuit wiring should pay attention to the "interleaved interference" introduced by signal lines running short distances. If there is no way to prevent parallel dispersion, a large plane or object surface can be placed on the other side of the parallel signal line to significantly reduce interference. It is almost impossible to prevent flat lines from appearing on the same layer, but in adjacent layers, the direction of the lines must be perpendicular to each other.


High-frequency circuit

High-frequency circuit

(6) The ground envelope method is applicable to signal lines or some particularly tight units, that is, to draw the approximate outline of the selected object. By using this function, it can semi automatically perform the so-called "land cover" processing on the marked closed signal lines. Of course, using this feature for land cover processing of timing clocks and other units will also be very useful for high-speed systems. benefit.

(7) Various signal wiring cannot form a circuit, and grounding cannot form a current circuit.

(8) High frequency decoupling capacitors should be installed near each integrated circuit block.

(9) When connecting analog and digital ground wires to a common ground wire, a high-frequency circuit choke should be used. In the actual assembly of high-frequency chokes, high-frequency ferrite gas magnetic beads with perforated core wires are often used. They are usually not represented in circuit schematics and do not use generated netlists. It contains such components, so they will be ignored when wiring. In view of this, it can be regarded as an inductor in the schematic diagram, and a separate component package can be defined for it in the PCB component library, and it can be manually moved to a suitable position near the common ground bus node. Wiring.

(10) Analog circuits and digital circuits should be placed separately. After independent wiring, the power and ground should be connected at a single point to prevent mutual interference.

(11) Before connecting DSP, off chip program memory, and numerical memory to the power supply, filtering capacitors should be added and placed as close as possible to the chip power supply pins to filter out power supply noise. In addition, shielding measures have been proposed around key components such as DSP, off chip program memory, and value memory to reduce external interference.

(12) Off chip program memory and value memory should be placed as close as possible to the DSP chip, and the layout should be reasonable to ensure that the difference between value lines and address lines is basically consistent. Same, especially when there are multiple memories in the system. The clock input distance from the clock line to each memory is equal, or a separate programmable clock driver chip can be added. For DSP systems, external memory with similar access speed to DSP should be selected, otherwise the high-speed processing experience of DSP will not be fully utilized. The instruction cycle of DSP is in the nanosecond range, so the most obvious problem in DSP hardware systems is high-frequency interference. When manufacturing printed circuit boards (PCBs) for DSP hardware systems, attention should be paid to the accurate and reasonable routing of address and value signal lines. When wiring, try to keep high-frequency wires short and thick, and keep them away from sensitive signal lines such as analog signal lines. When the peripheral circuits of DSP are relatively complex, it is recommended to make the DSP and its clock circuit, reset circuit, off chip program memory, and numerical memory the smallest system to reduce interference.

(13) According to the above principles, after using mature preset tools and completing manual wiring, advanced PCB simulation is generally required for high-frequency circuits to improve system reliability and productivity. This software performs simulations.


Due to space limitations in this article, I will provide a detailed explanation of the errors and specific simulations, but my suggestion to everyone is that if possible, the system must be simulated. Here are some basic concepts. Give everyone a basic explanation.